Research in VLSI Circuit Testing, Verification, and
Diagnosis
The University of Illinois at Urbana-Champaign
keywords: VLSI circuit testing, CAD, test generation, fault simulation,
fault diagnosis, design for testability, design verification, electronic
design automation
IGATE
is a test generation and diagnosis system based on Genetic Algorithms (GAs)
being developed at the University of Illinois' Center for Reliable and
High Performance Computing. This project involves research and development
in the areas of automatic test generation and fault diagnosis for the large
chips envisioned by the high performance computing and communications industry.
The test generator developed will be able to handle industrial chips with
greater than one million transistors and containing complex design features,
such as multiple clocks, internally derived clocks, gated clocks, mixed
positive and negative clocking, a mix of latches and flip-flops, asynchronous
logic, embedded RAMs, ROMs, and bidirectional switches. The project is
being funded by the Advanced Research Projects Agency (ARPA), by the Semiconductor
Research Corporation (SRC), and by Hewlett-Packard.
IGATE Research
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Test Generation
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Fault Simulation
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Design for Testability
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Delay Fault Testing
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Testability Measures
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Fault Diagnosis
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Bridge Fault Testing
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Memory & Iterative Logic Array Testing
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Power Estimation
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Design Verification
Project Members
Alumni
CAD Tools Available
Test Vectors Available
Benchmark Circuits Available
Last Updated: August 29, 2000
Send any questions to patel@crhc.uiuc.edu
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