This paper presents a design strategy for efficient and comprehensive testing of embedded Dynamic Content Addressable Memory (DCAM), where the address, data and hit lines are not externally controllable or observable. Based on the design for testability approach, three algorithms are developed for testing common functional faults in CAMs. The first algorithm provides a new method of detecting pattern sensitive faults over a neighborhood size of nine and thereby tests a w word CAM in 33w+2b+64 operations, where b is the number of bits in a word. The proposed algorithm is significantly more efficient than other embedded procedures for testing pattern sensitive faults. The embedded CAM can be tested for pattern sensitive faults by using an extra w+14 transistors without the need for a signature analyzer. Two additional simple algorithms are given in the Appendix for testing embedded CAMs for stuck-at and adjacent-cell coupling faults.
This research was supported by the Semiconductor Research Corporation under contract number 86-12-109.